CENG 6332 - High Performance Computer Architecture

CENG 6332 – 1&2 : High Performance Computer Architecture

Fall 2013

UHCL Computer Engineering

Description

Introduction to systems architecture design and tuning techniques for High Performance Computing; RISC’s, cache, pipelines, hypercubes, data-flow and supercomputers.

Instructor

Dr. Hakduran Koc

Room : Delta 110

Email : KocHakduran at uhcl dot edu

Web : http://sceweb.sce.uhcl.edu/koch/

Phone : x3877

Office Hours: Tue 1-4pm, Wed 6-7pm, Thu 1-3pm

Teaching Assistant

Faruk Karaagac

Room : PC Lab (Delta Second Floor)

Email : KaraagacF5499 at uhcl dot edu

Office Hours: Wed 1-7pm, Thu 1-9pm

Meeting

Section 1: Wed 1:00-3:50pm in Room D136

Section 2: Tue 7:00-9:50pm in Room D242

Textbook

Computer Architecture: A Quantitative Approach by John Hennessy and David Patterson; 5th Edition; Morgan Kaufmann; 20011; ISBN: 9780123838728.

References

o Computer Organization and Design: The Hardware and Software Interface by David Patterson and John Hennessy, Revised 4th Edition, Morgan Kaufmann, 2011; ISBN: 9780123747501.

o Parallel Computer Organization and Design by Michel Dubois, Murali Annavaram and Per Stenstrom, 1^st Edition, Cambridge University Press, 2012; ISBN: 9780521886758.

Announcements

- August 23: Welcome to CENG 6332!

Tentative Course Schedule

Date

Topics covered

Week 1 :

Aug. 27/28

Intro to class, Overview, Syllabus (Section 1 , Section 2)

Week 2 :

Sept. 3/4

Fundamental Concepts and Performance Analysis

HW 1 – Due: September 17/18

Week 3 :

Sept. 10/11

Fundamentals of Quantitative Design and Analysis

HW 2 – Due: September 24/25

Week 4 :

Sept. 17/18

Instruction Set Principles – App. A

HW 3 – Due: October 1/2

Week 5 :

Sept. 24/25

Instruction Set Principles

Week 6 :

Oct. 1/2

The Processor: Datapath, Controller

Pipelining: Basic and Intermediate Concepts

HW 4 – Due: October 22/23

Week 7 :

Oct. 8/9

Exam 1 (Tentative date for both sections: October 12)

Week 8 :

Oct. 15/16

Instruction Level Parallelism and its Exploitation

HW 5 – Due: October 29/30

Week 9 :

Oct. 22/23

Dynamic Scheduling, Superscalar and Multiple-issue Architectures

Week 10 :

Oct. 29/30

Review of Memory Hierarchy

HW 6 – Due: November 19/20

Week 11 :

Nov. 5/6

Memory Hierarchy Design

HW 7 – BONUS ASSIGNMENT - Due: November 26 for both sections

Week 12 :

Nov. 12/13

Exam 2 (Tentative date for both sections: November 16)

Week 13 :

Nov. 19/20

Storage Systems
Interconnection Networks

Week 14 :

Nov. 26/27

Thanksgiving Holiday for Section 1

All students may attend the review session at Section 2 class time!

Week 15 :

Dec. 3/4

Thread Level Parallelism

Multicores, Multiprocessors, Clusters

Reading: The Trouble with Multi-core by David Patterson

Exam 3: Saturday, December 7 (Tentative)

Grades - (Updated: Nov. 21)

LINKS

- Tom’s Hardware

- SPEC Benchmarks

CENG 6332